|
The possible defect on Au ver1 bank 34
|
|
2
|
44
|
April 8, 2025
|
|
Inaccessible pins on breakout board? on 'c' bank?
|
|
5
|
53
|
April 1, 2025
|
|
New Alchitry Cu on macOS
|
|
12
|
141
|
March 29, 2025
|
|
Labs 2 Error Message
|
|
4
|
53
|
March 28, 2025
|
|
Alchitry Labs freezes
|
|
9
|
116
|
March 28, 2025
|
|
Alchitry Au v2 oscillator tolerance
|
|
3
|
41
|
March 28, 2025
|
|
Vivado Error Using Labs 2!
|
|
7
|
72
|
March 21, 2025
|
|
Labs V2 suggestions
|
|
18
|
207
|
March 21, 2025
|
|
Does bin_to_dec.luc handle negative numbers?
|
|
1
|
16
|
March 20, 2025
|
|
Au+ Standard Vivado Project
|
|
2
|
386
|
June 14, 2024
|
|
How to power GPIO pins on the Alchitry Br
|
|
2
|
50
|
March 11, 2025
|
|
Lucid V2 test bench help
|
|
3
|
55
|
March 6, 2025
|
|
Verilog modules are "not used"
|
|
1
|
40
|
March 6, 2025
|
|
Alchitry AU USB connector
|
|
11
|
118
|
March 1, 2025
|
|
Alchitry AU (V1) connector STEP file
|
|
5
|
44
|
March 1, 2025
|
|
Alchitry Cu V2 3D Print Case
|
|
0
|
45
|
February 28, 2025
|
|
Alchitry Cu External Clock
|
|
4
|
66
|
February 27, 2025
|
|
V2 on other shops?
|
|
1
|
72
|
February 24, 2025
|
|
Initial (mixed) success with the new Au v2!
|
|
3
|
67
|
February 24, 2025
|
|
Issues with I2C reading eeprom 24AA32A
|
|
3
|
53
|
February 14, 2025
|
|
Vivado legacy instalation
|
|
1
|
40
|
February 11, 2025
|
|
AU SPI question (slave mode)
|
|
44
|
225
|
February 7, 2025
|
|
Do test benches work with Verilog modules?
|
|
4
|
50
|
February 7, 2025
|
|
Does the serial terminal work with Cu V2?
|
|
7
|
65
|
February 5, 2025
|
|
CLK Generation from FPGA
|
|
6
|
109
|
February 5, 2025
|
|
Arch Linux - ChacyOS support for Alchitry Labs V2 2.0.24
|
|
2
|
81
|
January 27, 2025
|
|
IDE Hangs for large builds
|
|
3
|
42
|
January 27, 2025
|
|
Contact to Alchitry shop
|
|
1
|
41
|
January 26, 2025
|
|
Yosys error: can't guess frontend for input file
|
|
9
|
241
|
January 25, 2025
|
|
New Project fails in Ubuntu/kUbuntu with Plasma Desktop
|
|
4
|
60
|
January 24, 2025
|