Hi,
Is there a template for the Cu V2 shield? I see ones for the V1 design but none for the V2.
Hi,
Is there a template for the Cu V2 shield? I see ones for the V1 design but none for the V2.
I actually just made one yesterday. It’s only for the bottom connectors though (to connect to the Cu/Au/Pt top).
V2_Element_Template.zip (6.4 KB)
Any chance we could get a KiCAD version of this? Or, are there mechanical drawings that show connector placement for the Cu V2 boards? Are they identical to the Au V2 boards? A KiCAD project of the breakout board would make it really easy to spin your own custom shields.
IIRC the Cu and Au have the same component placements. I started working on a KiCAD template, but the drawing and schematic on the Au page should have all the information needed to reverse engineer the connector placement!
Here is a template in KiCAD I whipped up. No routing has been performed, I just copied the labels off the Au Schematic into the template schematic. connector positions should be correct.
If someone could check the work and let me know if it’s any good I’d be much obliged!
HatTemplate.zip (1.9 MB)
All the boards use the same connectors in the same places.
Thanks for making a KiCAD template! I just took a peak and it looks like the bottom connector footprints aren’t quite right. They’re a bit weird in that they have four extra pins that go nowhere. Take a look at page 14 of the docs and you’ll see the slightly larger pads they recommend on the ends.
Thanks! I’ll take a look. It was probably the connector that had multiple foot prints in the download from DigiKey.
I updated the foot prints of the bottom connectors. I also added in the edge chamfers which I couldn’t recall was in the previous version or not. Let me know if you see any major issues!
I added in the LCSC part numbers too, so JLCPCB should be happy with the connectors if anyone uses them for fab.
ElementTemplate.zip (3.8 MB)
Also, I think it would be nice if somewhere there could be general design “best practices” for element boards. Examples of things I’d like to know are: what size vias are used on the existing element boards? What size tracks are used? Are there any considerations for how tall components on the bottom of an element can be if it’s directly above the FPGA board?
I’m planning to do this including a video going through making a custom board.
As for knowing if your components will fit, the best way to check is to 3D model it with the STEP file for the board.
You are generally safe with anything under 1mm tall except above the USB port which has about 0.7mm of clearance.