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About the General category
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0
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122
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March 15, 2024
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Hey guys look at this
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2
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63
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June 1, 2026
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Proposal to tweak DQS pin-mapping on future Au V2+
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1
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27
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June 1, 2026
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Cu V2 and IO Synthesis with APIO
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1
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39
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May 12, 2026
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Cu V2 video solutions
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5
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122
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May 7, 2026
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CU V2 with Diamond Programmer
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5
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39
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March 30, 2026
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Au+ Standard Vivado Project
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5
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577
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March 25, 2026
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FTDI USB Serial port no longer connecting
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2
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71
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March 25, 2026
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SPI flash swaping on Au V2
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19
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241
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March 20, 2026
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How to program configuration flash on Au V2 board?
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2
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32
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March 19, 2026
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Raspberry Pi PCIe Adapter Form Factor
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8
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54
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March 18, 2026
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Pt V2 Evolution
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1
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86
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February 12, 2026
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V2 → V1 Adapter incompatibility
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2
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70
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January 10, 2026
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How to use iceprog to flash cu v2
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2
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104
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December 12, 2025
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Regulator failure on 1V8 from ADP5052ACPZ-R7 on Pt board?
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4
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89
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November 18, 2025
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Schematic issue on Pt (34_L21N connected to 34_L15_N)?
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2
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86
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November 14, 2025
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Using the usb as serial port
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3
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85
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November 14, 2025
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Pt bottom side to Br breakout board pinout issue
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10
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127
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November 5, 2025
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PCIe connector board
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1
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70
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November 4, 2025
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V2 Power/Control JTAG
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1
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62
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November 4, 2025
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V2 Shield Template
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10
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314
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October 31, 2025
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Thought on Litex support for the v2 boards
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1
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76
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October 28, 2025
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No Devices Detected with Vivado Hardware Manager
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27
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2523
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October 17, 2025
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Community Feedback
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13
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320
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September 25, 2025
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Sense of ack_write in I2C module seems backwards
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1
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75
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September 18, 2025
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Servos safe to directly connect to Au V1
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2
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67
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September 18, 2025
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Issues getting started with Alchitry Labs IDE 2.0.39
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2
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93
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September 18, 2025
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Component part numbers
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17
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265
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September 11, 2025
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What happened to A1, B1, A2 , B2 , A7 , B7 etc
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1
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82
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August 15, 2025
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Is it possible to use Vivado to write HDL and program the V2 boards directly?
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3
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184
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August 9, 2025
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