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About the Help Request category
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0
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75
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March 15, 2024
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Alchitry HD Demos?
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1
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8
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April 11, 2025
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Moving Projects from Lab1 to Labs2
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12
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69
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April 11, 2025
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no boot for alchitry au
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1
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5
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April 11, 2025
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How to connect 7 Segment display with Alchitry Au through breadboard?
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3
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43
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April 8, 2025
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Error with counter component in Labs v2
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0
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12
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April 7, 2025
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Labs 2 Error Message
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4
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48
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March 28, 2025
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Vivado Error Using Labs 2!
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7
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60
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March 21, 2025
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Does bin_to_dec.luc handle negative numbers?
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1
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14
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March 20, 2025
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Alchitry Au mechanical placement of connectors
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6
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52
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March 18, 2025
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How to power GPIO pins on the Alchitry Br
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2
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36
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March 11, 2025
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Lucid V2 test bench help
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3
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49
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March 6, 2025
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Alchitry Cu External Clock
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4
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63
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February 27, 2025
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Issues with I2C reading eeprom 24AA32A
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3
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47
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February 14, 2025
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Vivado legacy instalation
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1
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37
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February 11, 2025
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AU SPI question (slave mode)
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44
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185
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February 7, 2025
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Do test benches work with Verilog modules?
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4
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44
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February 7, 2025
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Does the serial terminal work with Cu V2?
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7
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58
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February 5, 2025
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IDE Hangs for large builds
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3
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40
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January 27, 2025
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Contact to Alchitry shop
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1
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35
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January 26, 2025
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Yosys error: can't guess frontend for input file
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9
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223
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January 25, 2025
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Unable top create new project
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2
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52
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January 20, 2025
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Help/Question: Need 88 LVDS Pairs for Piano Project
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9
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69
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January 20, 2025
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Finding a connectors for Alchitry Au Board
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1
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37
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January 10, 2025
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Button problems
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5
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71
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December 20, 2024
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Au+ Bitstream settings for Quad Mode?
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11
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84
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December 12, 2024
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Verilog top module in V2
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23
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184
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December 10, 2024
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Cannot flash Au
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27
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108
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December 9, 2024
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Lucid languauge question about dff
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3
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57
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December 4, 2024
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Alchitry AU I/O guide connected to BANK A/B/C/D
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7
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216
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November 26, 2024
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