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About the Help Request category
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0
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75
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March 15, 2024
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Ubuntu issues with alchitryloader and serial port
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15
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47
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June 10, 2025
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Alchitry Cu V2 Connection List
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6
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41
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June 7, 2025
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Au V2 having Issues with Vivado
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2
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29
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June 6, 2025
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Hd signal confusion
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4
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65
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May 18, 2025
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Trouble instantiating Ft module
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3
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51
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May 10, 2025
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Flashing the CU V2 without Alchitry Labs
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3
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84
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May 7, 2025
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Trouble monitoring serial transmission on Debian
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3
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51
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April 28, 2025
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Issues with IO Board Template
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4
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75
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April 28, 2025
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no boot for alchitry au
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4
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61
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April 20, 2025
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Alchitry Au mechanical placement of connectors
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7
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84
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April 19, 2025
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Cu + Ft "Unknown port name" and Yosys Failures (V2)
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2
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32
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April 18, 2025
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Moving Projects from Lab1 to Labs2
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14
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112
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April 17, 2025
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BR V2 board pinout diagram
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0
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37
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April 16, 2025
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Error with counter component in Labs v2
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3
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69
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April 16, 2025
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Supply via USBC
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1
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27
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April 16, 2025
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Alchitry HD Demos?
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2
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60
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April 16, 2025
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How to connect 7 Segment display with Alchitry Au through breadboard?
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3
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69
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April 8, 2025
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Labs 2 Error Message
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4
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53
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March 28, 2025
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Vivado Error Using Labs 2!
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7
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75
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March 21, 2025
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Does bin_to_dec.luc handle negative numbers?
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1
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16
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March 20, 2025
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How to power GPIO pins on the Alchitry Br
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2
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54
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March 11, 2025
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Lucid V2 test bench help
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3
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55
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March 6, 2025
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Alchitry Cu External Clock
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4
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68
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February 27, 2025
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Issues with I2C reading eeprom 24AA32A
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3
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54
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February 14, 2025
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Vivado legacy instalation
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1
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40
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February 11, 2025
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AU SPI question (slave mode)
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44
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259
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February 7, 2025
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Do test benches work with Verilog modules?
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4
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54
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February 7, 2025
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Does the serial terminal work with Cu V2?
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7
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67
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February 5, 2025
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IDE Hangs for large builds
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3
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42
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January 27, 2025
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