|
How to connect 7 Segment display with Alchitry Au through breadboard?
|
|
0
|
6
|
April 3, 2025
|
|
Moving Projects from Lab1 to Labs2
|
|
4
|
35
|
April 2, 2025
|
|
Alchitry V2 Planning
|
|
114
|
795
|
April 2, 2025
|
|
Inaccessible pins on breakout board? on 'c' bank?
|
|
5
|
24
|
April 1, 2025
|
|
New Alchitry Cu on macOS
|
|
12
|
86
|
March 29, 2025
|
|
Labs 2 Error Message
|
|
4
|
44
|
March 28, 2025
|
|
Alchitry Labs freezes
|
|
9
|
100
|
March 28, 2025
|
|
Alchitry Au v2 oscillator tolerance
|
|
3
|
24
|
March 28, 2025
|
|
Vivado Error Using Labs 2!
|
|
7
|
60
|
March 21, 2025
|
|
Stacking boards
|
|
4
|
49
|
March 21, 2025
|
|
Labs V2 suggestions
|
|
18
|
160
|
March 21, 2025
|
|
Does bin_to_dec.luc handle negative numbers?
|
|
1
|
12
|
March 20, 2025
|
|
Alchitry Au mechanical placement of connectors
|
|
6
|
44
|
March 18, 2025
|
|
Au+ Standard Vivado Project
|
|
2
|
338
|
June 14, 2024
|
|
How to power GPIO pins on the Alchitry Br
|
|
2
|
32
|
March 11, 2025
|
|
Lucid V2 test bench help
|
|
3
|
46
|
March 6, 2025
|
|
Verilog modules are "not used"
|
|
1
|
35
|
March 6, 2025
|
|
Alchitry AU USB connector
|
|
11
|
103
|
March 1, 2025
|
|
Alchitry AU (V1) connector STEP file
|
|
5
|
38
|
March 1, 2025
|
|
Alchitry Cu V2 3D Print Case
|
|
0
|
32
|
February 28, 2025
|
|
Alchitry Cu External Clock
|
|
4
|
63
|
February 27, 2025
|
|
V2 on other shops?
|
|
1
|
57
|
February 24, 2025
|
|
Initial (mixed) success with the new Au v2!
|
|
3
|
51
|
February 24, 2025
|
|
Issues with I2C reading eeprom 24AA32A
|
|
3
|
46
|
February 14, 2025
|
|
Vivado legacy instalation
|
|
1
|
36
|
February 11, 2025
|
|
AU SPI question (slave mode)
|
|
44
|
181
|
February 7, 2025
|
|
Do test benches work with Verilog modules?
|
|
4
|
42
|
February 7, 2025
|
|
Does the serial terminal work with Cu V2?
|
|
7
|
56
|
February 5, 2025
|
|
CLK Generation from FPGA
|
|
6
|
94
|
February 5, 2025
|
|
Arch Linux - ChacyOS support for Alchitry Labs V2 2.0.24
|
|
2
|
59
|
January 27, 2025
|