V2 → V1 Adapter incompatibility

General
1

The original AU v1 has a bug: pins 45 and 46 are swapped on bank A. The V2-to-V1 adapter does not account for this bug and reverses the polarity of the differential pairs at this position. Due to this incompatibility, it is not possible to use the adapter in my project.

Could you please publish the source data (KiCad/Eagle) for this adapter? I need to create a new adapter in order to use the V2 boards.

2

Sorry for the late reply.

I didn’t know about this V1 bug… That’s annoying.

While you’re welcome to make a new board, I think you can just work around it inside the FPGA. It’s pretty common practice to swap P and N pins when routing for convenience then just negate the values. I assume you’re using them as a differential pair (otherwise who care about the flip)?

I’m happy to help figure out a workaround if you can share a snippet of how you’re using them.

V2 to V1 Adapter.zip (11.8 MB)

3

Hi,

i use this GitHub - hdl-util/hdmi: Send video/audio over HDMI on an FPGA and

genvar i;
generate

for (i = 0; i < 3; i++)
begin: obufds_gen
    OBUFDS #(.IOSTANDARD("TMDS_33")) obufds (.I(tmds\[i\]), .O(data_p\[i\]), .OB(data_n\[i\]))           end

OBUFDS #(.IOSTANDARD("TMDS_33")) obufds_clock(.I(tmds_clock), .O(clk_p), .OB(clk_n));

endgenerate

I use tmds[0] at pins 45 and 46. If tmds[0] is inverted before, Vivado has problem to implement it.