I have some old v1 modules both the Au and the Ft module. I was trying to develop module myself to communicate with the FT module myself and as I was debugging a few things I discovered that TXE_n is always high, even right after connecting to the computer, even though the FPGA has written nothing to the FT600. This had me searching through the schematic and FT60X manual when I noticed in the schematic that the GPIO pins were unconnected. This is somewhat worrying to me as the manual says:
GPOI[1:0] are multifunctional pins. The functions are configured by the chip configuration data. The default chip configuration sets the GPIO pins as FIFO mode configuration input. At the power up, FT600 or FT601 sets the chip to 245 synchronous FIFO mode or multi-channel FIFO modes depending on the GPIO[1:0] input, details in the table below:
The table says the GPIO pins must both be 0 to set the chip to the 245 synchronous FIFO mode.
I cannot see anything about default pull-downs or anything for those pins. Is this a possible cause for the issue I am seeing? If so, is there a way around this other than blue-wiring the board?