Multi-Level IO Guide for 1.8V IO

I am looking to make a project that will use the 1.8V capability of the Au V2. I am not finding all the info I need to get started. Is there an actual guide on configuring the IOs to 1.8V.

I saw the table and know I need to drive the VBSEL_A high and the VBSEL_B low. Is there a specific place to drive these? Do I need to modify the board? Is it driven by the FPGA IOs? (The schematic doesn’t show an FPGA connection, so I assume no.) I assume that all the IOs on the mixed domain bank move at the same voltage, is this true?

Additionally, I am looking to use LVCMOS18 as the standard. But that is highlighted red in the IDE as an unsupported standard. Is there a better standard to use?

Thank you in advanced for the help.

Hello,
About the pins, they are exposed on the C bank connector.
There is no place on the board itself to set them, if you have a Br, you might use it to access the pins and put a resistor.
If you are designing a custom carrier board, you should add the resistor there.

Sorry for the long time in replying.

See Pinouts and Custom Elements if you haven’t already. The VBSEL pins are exposed, as @gc74 said, on the control bank. This lets you wire your custom board to set these correctly when connected. You can also use a Br to set them.

If you’re getting a error about unsupported standards, make sure that A) the pins are multi-voltage pins and B) no other multi-voltage pins are using an IO standard that requires a different VCCO.