Pt V2 Evolution

General
1

I am very pleased with the PtV2 effort. I got several of the early Alpha boards to evaluate how well PtV2 board satisfies my needs. Here I would like to share some thoughts:

The number of low voltage ports (the switchable 1.8/2.5/3.3 VCCO) is still too limited (16 differential pairs in Bank13). Applications that use low power/high speed data acquisition interfaces (LVDS and SPI at 1.8V) would benefit from having at least 2-3 times of that number. In my current application(s) I use 24 pairs IN and 8 pair OUT of LVDS, and ~ 20 LVCMOS18 signals in my Altera MAX-10 board designed a while ago. With this design I am limited by a small size of on-chip memory as I use several dual-port RAMs. The PtV2 board offers about 2.5 times more of these resources, with a promise to increase that by another factor of three when (hopefully) upgrading to 200 chip. The elegant design and small size factor of PtV2 board is another plus. What I desperately need, however, is much bigger pool of the LVDS compatible differential pairs. Expanding the switchable 2.5V/3.3V VCCIO to Bank 16 at the bottom on the future edition of PtV2 board would do the trick.

Potential implementation:

1. Remove the current connection between VBSELA/B on the top and the bottom C connectors.

2. Wire the 3.3V power to pins VBSELA/B on the bottom C connector through big 603 or 402, zero Ohm resistor.

3. Wire these pins to VCCIO power of Bank16.

That will preserve the 3.3V power on this bank for the current users. Those of us who want to mess with the Bank 16 VCCO power can remove this resistor, and design our own 1.8V/2.5V power on the bottom daughter board, then wire this power to the VBSELA/B pins on the bottom C connector. The 600 mA power (two pins of the bottom C connector) is sufficient to power I/O ports on Bank 16.

I realize that potential implementation of these solutions requires some consensus based on community needs and expectation, and the on the engineering aspect of implementing such modification. Here I would like to initiate a discussion on this matter.

2

Hmmm. What if instead we just made VBSEL on the bottom work as VBSEL does on the top but it switches bank 16?

3

Like that idea and saw your YouTube video on the PTV2 rev B routing. With that I guess I am to late with following for rev B. The VB34 / VB16 is not routed on any DF40 pins. Would have loved to have the IO voltage available at my upper board. I know that the assignment of the DF40 can’t be changed for backwards compatibility. But on future revisions their could be potentially some solder pads for grabbing easily the VB34 / VB16 on the PT / AU boards (wire-connect to upper and lower shields).

4

We’re starting production of the rev B boards next week!

We intentionally didn’t expose the bank voltages as the regulators can’t supply much more than what the IO pins could consume. If you need the 1.8V or 2.5V on a separate board you should use a regular and pull from the 3.3V or “raw” rails. We used to have the 2.5V exposed on the first version of the Au but it was replaced with the second VBSEL pin. It wasn’t intended to power anything though and just used to set the bank voltage.