I found out that Vivado have a set of bridge files stored in Xilinx\Vivado\<version>\data\xicom\cfgmem\bitfile.zip.
In the hardware manager we can manually pick one of them, but it looks like it only allows us to tell which interface is used.
It seems the list of allowed flash chip may be hard-coded somewhere but I can’t find it so far.
What I was thinking is : if we can write a custom bridge that would be accepted by Vivado, then maybe we can spoof the flash ID to one that is in the Vivado’s list?
Now the question is, do we have what we need (specs, docs, etc. of what Vivado expect?, Is it standard?)
EDIT: I found something that looks like a configuration file that define how to handle various flash chips :
Xilinx\Vivado\<version>\data\xicom\spi.cfg
Maybe we just have to add our chip’s parameters in that?
And this one too :
Xilinx\Vivado\<version>\data\xicom\xicom_cfgmem_part_table.csv
I managed to add the chip to the list, but Vivado don’t have QSPI bridge file for Artix7, so I tried simple SPI instead but it looks like the built-in SPI bridge don’t get answers from the chip :
readback_hw_cfgmem -hw_cfgmem [get_property PROGRAM.HW_CFGMEM
[get_hw_devices xc7a35t_0 ]] -file F:/Xilinx/proj/System1/System1.runs/impl_1/test.rmcs -format MCS -force -all
Mfg ID : 0 Memory Type : 0 Memory Capacity : 0 Device ID 1 : 0 Device ID 2 : 0