I’m designing a PCB board and I have a lot of analog, digital, and highspeed I/O that need to be routed to FPGA. Is there any guideline as which one of the pins in the banks I can use?
Some of my outputs are also on 1.8V. Do I need to level shift it to 3.3V before I connect them to FPGA?
You may find this document helpful. It shows the pinout of the Au. Basically any IO pin is interchangeable ( pins that can be used as differential pairs have N/P suffixes). Note that TMDS is the only differential output standard for 3.3V. LVDS can be used as an input on any diff pair though.
The pins labeled GCLK should be used for clock inputs. If your clock is single ended, you must use the P pin of the diff pair.
WIth a 1.8V level signal, on the Au you can hook them up to the purple pins with a DV suffix and connect VBSEL to 1V8 (on Bank D). This will set all the dual voltage pins to 1.8V.
You will also need to set the pin standard to LVCMOS18. This currently isn’t possible in Alchitry Labs V2 but a custom .xdc file in Labs V1 can do it. This is the next feature to be added to V2.
You may also find the select IO document and the switching characteristics document helpful. The first outlines the available IO resources and the second outlines stuff like switching thresholds.
Thank you so much. This was very helpful.
Can I use higher voltages like 5V for analog or digital?
Per the docs, the XADC inputs have a range of 1V (0-1V in unipolar mode -0.5-0.5 in bipolar).
When IO is set to LVCMOS33 (the default in Alchitry Labs), the IO pin has an absolute maximum rating of 3.85V. If set to LVCMOS25 and used as an input then it is 2.625V.
In general, it is Vcco + 0.55V so the dual voltage bank has a max of 2.35V when at 1.8V.
So, no. 5V will destroy the chip.
Is there a guide to the color coding used in that doc?
Teal are general purpose IO. IO with a P/N can be TMDS IO or LVDS_25 inputs. The purple are dual voltage pins (switchable from 3.3v to 1.8v via vbsel). The dark blue are possible XADC inputs.
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Oh good, you’re still intending to support having some 1.8v lines. I thought you were only going to let them down to 2.5v for lvds25 or something.
Reason I care is on the chance that I wind up needing to hook up psram, which can be clocked faster when running at 1.8v. And it looks like there’s 20 1.8v-capable pins available, which is plenty.
No, this document is for V1. V2 is just 2.5V.
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