FSM Stopwatch Example

In chapter 5 of Learning FPGAs, a stopwatch is built demonstrating use of the finite state machine type. I noticed that the stopwatch seemed to count too fast.

At the time of the writing, the Mojo board ran at 50 MHz. However, the Au board now runs at 100 MHz. The stopwatch was ticking every 50 ms instead of every 100ms

To count correctly in tenths of a second, the tenth_ctr must be 24 bits wide to hold 10,000,000 ticks. And, the max tick check in the RUNNING state case should be 9999999 instead of 4999999.