Au+ Standard Vivado Project

Hello. I am new to the Alchitry board but very familiar with FPGAs in general. I’m curious if there is just a plain 'ol Vivado project template for the Alchitry AU+ board. I know this website wants to use Alchitry Labs and Lucid for development, but I am required to just deliver a standard Vivado project.

Other FPGA boards I’ve used provide a “Vivado Board Definition File” which has all the settings and pinouts and such, and on others they just provide you a XDC pinout/timing constraints, sometimes an entire Vivado Project.

I am happy to make my own based off the schematic, but where it usually gets tricky is setting up the DDR controller properly with timings and clocking structures. It would help me out a lot to have an example.

Someone can correct me if I’m wrong, but I believe the answer is no; however, every Alchitry Labs project creates a Vivado project in the background in the subdirectory work/vivado/(project name).

You can start a project using Alchitry and then work directly from Vivado after that.

The biggest problem with using it as a “template” are the constraints. The Alchitry constraints file usually has all the pins defined with the ones you don’t use commented out. The corresponding file in Vivado will just have the pins you use.

If you really want a proper Vivado template file, you might consider creating a dummy Alchitry file that connects to ALL the pins, then going to the Vivado file and commenting out the ones you don’t want.

The translation matrix is probably somewhere in the code, but someone else will have to tell you where.

Of course, another problem is that Alchitry is not an official Xilinx dev board, so it will not show up under the hardware manager. You can only download bitfiles via alchitry labs or the standalone loader.

There is a basic project for the Au. You would need to change the FPGA to the xc7a100tiftg256-1L in Vivado for the Au+.

This project is pretty minimal and the easiest way to get more of the pins is to create a demo project in Alchitry Labs, build it, and steal the Vivado project from the build folder.

Alternatively, here’s the source for the pin translation Alchitry-Labs-V2/src/main/kotlin/com/alchitry/labs2/hardware/pinout/AuPin.kt at master · alchitry/Alchitry-Labs-V2 · GitHub

The format is AlchitryName(“FPGA pin”) so you’d use the value in quotes for the pin.

For the DDR, you can use this .prj file to provide the pin names and all that for Vivado. Alchitry-Labs/library/components/mig_plus.prj at master · alchitry/Alchitry-Labs · GitHub

In Alchitry Labs 1.x.x, you can one-click add the MIG to your project. You could do this and then steal the resulting Vivado project if you want.