Au + Board IP's

[howdyrichard]

First, I'm trying to add uarts to serial_port_echo and Alichity Labs doesn't like it.  I was able to make the additional pin assignments in Vivado and it worked.  Is there a way to run these tutorials in Vivado so I can add to the simulation without errors.  For example, when I added uart pins, described them in alchitry.acf, it left 'nulls' in place of the pin assignments in Vivado.  After filling them in, Vivado would create a usable bit stream but then I can't modify au_top_plus anymore. 

I do not see this board in Xilinx store so I can not get IP's created for it like you can other evaluation boards.  Is there a way to construct them with existing files in Alchitry Labs or am I wasting my time?  I need 3 extra rs-232 ports combined with DDR to make my project work and I am getting frustrated with trying to use Lucid outside of the demo tutorials.

Any comments would be appreciated.

[alchitry]

I can't really vouch for working in Vivado and Alchitry Labs. You should stick to one or the other for most projects.

In Alchitry Labs, the .acf files use the Alchitry pinout names, not the FPGA pins. It should spit out an error but it sounds like there's a bug and it isn't for you.

The pin names should be stuff like Ax, Bx, Cx, and Dx where the letter is the bank number and the pin is the header pin number.

You could use the actual FPGA pins names if you want but you need to use a .xdc file which has a much more verbose syntax.

[howdyrichard]

Thank you! That sure made a difference in design time!!! The reason streaming a text file did not work was that two stop bits needed to be set in the terminal program I was using to send the text file through the UARTs. Nothing in the code led me to believe that it should require two but it did.

Now on to trying to save two UARTs data in DRAM and then sending the data out a third UART to the satellite modem...