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FPGA configuration in SPI slave mode
Before starting to dig in the schematics:  the AU and AU+ FPGA can be configured via USB.
How to handle this without USB ? Are the pins (and maybe mode selection pins) available to perform FPGA configuration in SPI slave mode (e.g. from a microcontroller)

Unless I am overlooking something, it seems there is no document explaining some basic functionality of the modules and by reverse engineering the schematic it's easy to overlook something.
The programming pins are broken out over the "Bank D" connector in the bottom right of the board. For the Au and Au+ these are the JTAG port.

You can connect something like a Platform Cable USB II from Xilinx to it but you will need to adapt to it, probably with a Br.

The mode pins are tied to 001 and can't be changed.

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