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Au DDR tutorial gives "Critical Warning" on build
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I was duplicating the tutorial on how to use the DDR memory on the Au, but I get a Critical Warning upon building. 
The design runs ok, but the "Critical" part of the warning worries me a bit.

I think the problems start right at the start when I add the Memory Controller. It complains about not finding an .xci file:

[Image: img1.png]
Compare this to exactly the same stage in the tutorial:
[Image: img2.png]

It makes the same complaint after I add the clock wizard core (in fact it seems to say this after generating any cores).
When I add in all the code (exactly duplicating the tutorial), it successfully builds, but gives me the critical warning:
Code:
Parsing XDC File [C:/NarwhalDevices/FPGA_projects/DDR_example/work/constraint/alchitry.xdc]
CRITICAL WARNING: [Constraints 18-1056] Clock 'clk_0' completely overrides clock 'clk'.

Should I just ignore the warning, or is it a sign that there is something wrong, and it will come back to bite me?

Thanks,
Rory

Note: I'm using Windows 10, Alchitry Labs 1.2.1, and Vivado 2020.1
(see attachment for full output)


Attached Files
.txt   DDR tutorial Critical Warning.txt (Size: 84.02 KB / Downloads: 0)
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Au DDR tutorial gives "Critical Warning" on build - by Rory - 10-09-2020, 12:29 PM

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