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Constraints files
#2
Most of the constraint files are in Alchitry Labs and are written as "Alchitry Constraint Files"

If you have one in your project and build it, the converted .xdc file can be found in the work directory.

I attached one for the Io Element. (had to rename the extension from .xdc to .txt to upload)

The DDR is a bit difference since the core itself has the constraints. Normally, you'd use Alchitry Labs to auto add and build the component for you. However, you can do it using the mig.prj file from Alchitry Labs (download it here https://raw.githubusercontent.com/alchit...ts/mig.prj)

To use this, in Vivado open the IP catalog. Go to Memories & Storage Elements -> Memory Interface Generators -> Memory Interface Generator

Click Next. On the second page, choose "Verify Pin Changes and Update Design"

On the third page, give it the mig.prj file and the mig_7series_0.txt file attached (rename it to .xdc first)

On the next page click Validate then Next

Click Next until you get to Generate and click Generate.

You now have the MIG core to use in your project with the correct pinout and memory timing. See https://alchitry.com/blogs/tutorials/usi...lchitry-au for how to use it.


Attached Files
.txt   io.txt (Size: 8.48 KB / Downloads: 5)
.txt   mig_7series_0.txt (Size: 16.22 KB / Downloads: 5)
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Messages In This Thread
Constraints files - by TechPaula - 09-07-2020, 11:37 AM
RE: Constraints files - by alchitry - 11-02-2020, 06:45 PM

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