01-07-2021, 07:15 PM
Hi - I'm trying to work out exactly how this is addressed, and something's wrong with my math.
Starting assumption - it's a 256MB part, and has a 28-bit address field - which is really a 25-bit field since the last 3 are reserved as 0s for ordering. So there are 2**25 => 33,554,432 distinct addresses. Which is each address was for an 8-byte block, that multiplies back to 256 MB - but the data in bus is 128-bits / 16 bytes wide?
Do these overlap? Can I write to address '1' by writing 9 bytes into address '0'?
Alternatively, if it was really a 24-bit address field, with each address being a 16-byte/128-bit block, that would seem like a simpler explanation, if maybe the part interface is shared with a 512MB module and the MSB is unused in the Au's part.
Starting assumption - it's a 256MB part, and has a 28-bit address field - which is really a 25-bit field since the last 3 are reserved as 0s for ordering. So there are 2**25 => 33,554,432 distinct addresses. Which is each address was for an 8-byte block, that multiplies back to 256 MB - but the data in bus is 128-bits / 16 bytes wide?
Do these overlap? Can I write to address '1' by writing 9 bytes into address '0'?
Alternatively, if it was really a 24-bit address field, with each address being a 16-byte/128-bit block, that would seem like a simpler explanation, if maybe the part interface is shared with a 512MB module and the MSB is unused in the Au's part.