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FT2232HQ Configuration (Alchitry Au) - Printable Version

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FT2232HQ Configuration (Alchitry Au) - sabquat - 02-24-2021

Hello,
It looks like the FT2232HQ chip can be configured either as a full-duplex or as a half-duplex.
Is it possible to inform the actual configuration of the FT2232HQ chip on Alchitry Au? Is it configured as a full-duplex or as a half-duplex?


RE: FT2232HQ Configuration (Alchitry Au) - Rory - 03-21-2021

(02-24-2021, 07:52 AM)sabquat Wrote: Hello,
It looks like the FT2232HQ chip can be configured either as a full-duplex or as a half-duplex.
Is it possible to inform the actual configuration of the FT2232HQ chip on Alchitry Au? Is it configured as a full-duplex or as a half-duplex?

Hey,
Not sure if I can totally answer your question, but maybe I can offer some insight...

Firstly, you can check how the FT2232HQ chip is actually connected to the FPGA here. You can see that channel A is used to load the FPGA design into the FLASH, or directly onto the FPGA. Normally, if you are a regular user, you ignore this channel, and are only interested in channel B which gives you access to the UART "usb_rx" and "usb_tx" pins in Alchitry labs.

As for the full-duplex/half-duplex thing, I think that only relates to the RS458 UART standard. It looks like the RS232 standard says nothing about this, so I think it is probably "full-duplex". Notice in the schematics (again here) that only "USB_TX" and "USB_RX" are actually connected. RS232 has other connections that are optional (such as RTS and CTS).

To be honest, I don't actually know what standard the is used on the FT2232HQ that comes with the Alchitry boards, but I can say that you probably  don't care. 
I know that in the UART standard used in the boards you can set the baud rate to anything up to 12,000,000, and you can pump data in and out at that rate at the same time without needing to worry if your design is transmitting or receiving. If you look at the "uart_rx.luc" and "uart_tx.luc" in Alchitry labs, you can see that they are totally independent. The uart_rx.luc only need the rx signal, and the uart_tx.luc only needs the tx signal.

If you're doing something really complicated, maybe this won't help. But if you are just doing regular old sending and receiving bytes from your FPGA design, then you don't need to think about whether or not it is full-duplex or half-duplex.

Cheers,