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MOJO sdram
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  Register Interface not launching
Posted by: scienceryan - 03-09-2021, 06:23 AM - Forum: General Questions - Replies (1)

Hey All, Alchitry newbie here looking for some advice.

When I try to launch the Register Interface in Lucid, nothing happens (eg.dialog boxes do not come up) .

I am using Alchitry Labs Version 1.2.5 on Windows 10
java version "15.0.2" 2021-01-19
Java™ SE Runtime Environment (build 15.0.2+7-27)
Java HotSpot™ 64-Bit Server VM (build 15.0.2+7-27, mixed mode, sharing)


Thoughts?
Undecided


  Mojo V3 not connecting
Posted by: andreipit - 03-04-2021, 01:04 PM - Forum: General Questions - Replies (3)

I recently bought a Mojo V3, but after i write the code in Alchitry Labs, build it succesfully and then press Program nothing happens, it just says Connecting.
Any1 who can help me with this problem?


  FT2232HQ Configuration (Alchitry Au)
Posted by: sabquat - 02-24-2021, 07:52 AM - Forum: General Questions - Replies (1)

Hello,
It looks like the FT2232HQ chip can be configured either as a full-duplex or as a half-duplex.
Is it possible to inform the actual configuration of the FT2232HQ chip on Alchitry Au? Is it configured as a full-duplex or as a half-duplex?


  External clock shift register
Posted by: csereimarton - 02-20-2021, 07:54 AM - Forum: General Questions - Replies (1)

Hey all,

I would like to implement a shift register which reads and stores data on some lines based on a clock signal.
The clock signal is coming from an external chip (as well as the data). The frequency should be at about 40mhz.
I went through the tutorials on this site and searched on forums, but did not find such a thing.
I'm thinking it's a pretty generic scenario, however I can't really get results even for external clock. Is it something that's doable with FPGA?

I wrote a code for a simple D flip-flop array and connected it to the 8 leds. I used two arbitrary pins for data and clock.
For now I am using an avr to generate the data and clock signals with a lower frequency in order to see what's happening.
I checked the signals with a scope and they look pretty clean.

My issue right now is that the flip-flop seems to be triggered when data goes high (regardless of the clock). Other than that it works.
This is manifesting in getting all the high bits twice. Am I missing something?

The modified .ucf section

Code:
NET "clock" LOC = P5 | IOSTANDARD = LVCMOS18;
NET "data" LOC = P94 | IOSTANDARD = LVTTL;

The flip-flop:
Code:
module flipD #(parameter SIZE = 8) (
   input clock,
   input D,
   output [SIZE - 1 : 0] Q
 );

 reg [SIZE - 1 : 0] q;
 assign Q = q;

 always @(posedge clock) begin
   q = q << 1;
   q[0] = D;
 end

endmodule


Video Mojo V3 Lucid Sdram Test Wrong
Posted by: tistructor - 02-17-2021, 02:35 PM - Forum: General Questions - Replies (1)

I made the shield to test the sdram, I used the same components used to build the original.

Then I ran the SDram test in Lucid and I continue to detect output errors shown by the configuration of the LEDs on the board: LEDs 6: 0 on and 7 flashing.

So I tried to use the example in verilog under ise project navigator and with the latter the test works, 7 LEDs off and one flashing.

There must be some problem with the lucid project but I couldn't identify it.

Can someone try to do the sdram test on mojo V3 with Lucid
to identify the problem?

Thank you

[Image: ynLFrQ0]


  7 Seg Display Letters?
Posted by: CH3NO2 - 02-14-2021, 10:48 PM - Forum: General Questions - Replies (1)

Hello, is it possible to make the 7 segment display on the IO element shield display letters? Obviously not all letters are possible by the 7 segment design, but those that are, is that possible?

If so, how would I go about learning to do this? It would be especially useful for one of my projects.

Thank you


  Alchitry Cu Doesn't work with latest ICE2
Posted by: sponaugle - 02-12-2021, 03:42 AM - Forum: General Questions - Replies (1)

It would appear the latest version (December 2020) of the Lattice iCEcube2 does not work with the Alchitry Labs application.    Lattice removed the Active-HDL component, and I perhaps a few other changes.

The new version:  
https://www.latticesemi.com/Products/Des...S/iCEcube2

You can download the previous version (2017) from the archive section:

https://www.latticesemi.com/support/softwarearchive

I'm guessing this is a known problem, but it isn't mentioned on the install page.

"iCEcube2 Version 2020.12

  • Replaced Aldec™ Active-HDL™ with Mentor® ModelSim® Lattice FPGA Edition. Active-HDL Lattice Edition is still supported but not included."


Jeff Sponaugle


  Alchitry Labs not recognizing Alchitry-Au
Posted by: prebys - 02-11-2021, 02:36 AM - Forum: General Questions - Replies (2)

I'm using these boards in a class.  Students either run the software on their own Windows 10 machines, on W10 VMs on their Macs, or use remote computing and a local downloader.

For one of the students with his own Windows machine, the download step  hangs.  It doesn't say "No device found".  The log window is just blank.  If he tries the standalone downloader, it just permanently hangs.

Looking at the device manager, it sees two devices called "Alchitry-Au", while my working system sees the board as an unnamed "USB Port".

We tried to uninstall or disable those devices, but it still doesn't work.

Any advice would be appreciated.


  Mojo V3 Atmega32u4 Bootloader?
Posted by: Helder - 01-22-2021, 11:40 PM - Forum: General Questions - Replies (1)

What is the bootloader used on the Mojo v3's Atmega32u4? Is it the standalone arduino bootloader? is it opensource or hosted somewhere?

Thank you.


  Mojo V3 change pins for 16Bit sdram
Posted by: tistructor - 01-20-2021, 09:54 AM - Forum: General Questions - No Replies

I wanted to ask for information:
Can the I / O pins used in the SDRAM shield for the mojo be changed?
I wanted to manage a 16-bit module and a different configuration of the mojo pins is needed to achieve a good pcb design.

I checked the spartan-6 lx9 datasheet and I don't think there are any problems with the pins I'm using.

This is the pins list:
DQO -> P94
DQ1 -> P95
DQ2 -> P97
DQ3 -> P98
DQ4 -> P99
DQ5 -> P100
DQ6 -> P101
DQ7 -> P102
DQ8 -> P7
DQ9 -> P8
DQ10 -> P9
DQ11 -> P10
DQ12 -> P11
DQ13 -> P12
DQ14 -> P14
DQ15 -> P15

A0 -> P118
A1 -> P119
A2 -> P120
A3 -> P121
A4 -> P138
A5 -> P139
A6 -> P140
A7 -> P141
A8 -> P142
A9 -> P143
A10 -> P117
A11 -> P144
A12 -> P1

DQML -> 104
WE -> 105
CAS -> 111
RAS -> 112
CS -> 114
BA0 -> 115
BA1 -> 116

CLK -> P5
DQMH -> P6
CKE -> P2

schematic:
https://ibb.co/MPYdmnH

thank you

Fabio