I have a Mojo v3 board. I have set up the Xilinx ISE and installed Mojo-ide on Ubuntu 19.10 running in a VM on a Toshiba Laptop.

The Xilinx software runs fine. I have been doing exercises from Simon Monk's book "Programming FPGAs"
The Mojo-ide seems to work Ok I created a Project using the LEDtoButton Lucid file. I click on the mojo_top.luc and the file is displayed. I have setup the ISE location.

But when I attempt to build the project by selecting the hammer icon, after a few lines I get the following error message on the console in mojo-ide
"application: specific initialization failed: couldn't load file "librdi_commontasks.so": libncurses.so.5: cannot open shared object file: No such file or directory"

After using $sudo find command, these files exist on the ubuntu VM.
I have tried to google a solution without success 
I think it is a path problem but I can't figure it out.
Any help would be much appreciated.

Hello,
I have a mojo v3 board and I was wondering if it is possible to program the FPGA directly from Xilinx ISE, i.e, avoiding the need for mojo IDE.
Even more, maybe someday the mojo IDE could be unsupported...and in that case, it would be great to be able to use the XIlinx ISE for programming.

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Is it possible to create/use a soft core processor on the Au ?

And would this need Lucid or Vivado ?

Also are there PWM and such available ?

I am trying to create a motor controller for a robot.

Thanks,
JT

Complete beginner here
I've followed some Lucid tutorials for the Alchitry Cu and managed to get the code running. Now I want to connect an output device (a speaker) but I can't seem to find a component for the pins on the Alchitry Br. How can I access the pins in the Br?

Are there any standard peripherals (Ethernet, SD Card, sensors, etc...) that are available which conform to these headers?

The Au and Cu are beautiful boards, but they are too tight for prototyping.  Here are a few new parts we need in the store to support REAL world applications of the Alchitry products.

1. Ribbon cables to connect the male/female IO headers (so that the Au and Br boards can be separated)
2. Standoff's allowing the boards can be separated (so components on the Br board to not short to the Au board)
3. A 1-bank (A, B, C, D) protoboard with the remaining space for electrically connected through (holes for building circuits)
4. A 2-bank (A+B, C+D, A+C, B+D) protoboard with the remaining space for electrically connected through (holes for building circuits)
5. A regular protoboard

In the photo below, you see that I am trying to connect a Raspberry Pi Zero W and two CAN Transcievers to the Au FPGA.  The second CAN Transciever had to be cut off since it hit the USB connector on the AU board and would create an electrical short.  This is why I need the ribbon cables and the standoffs.  

NOTE1: I will have to scrap the Br board and build a new one with the CAN Transcievers better placed.  
NOTE2: The mounting holes on the Au and Br boards do not align with the RPi mounting holes, so I had to expand one of the Br board holes with a file.

https://i.postimg.cc/kXZfPxkm/IMG-1903.jpg

I want to connect I/O to this board. I don't know what type of headers these are. I don't know what to search for in terms of connectors. What style of header connection is this? I can't find any type of part description for them.

I am interested in adding a WiFi-enabled microcontroller to the Au stack.  In essence, I want to use the WiFi connection to configure settings on the programmed FPGA using a tablet and a simple web page.  My fear is that the current shield design is so small, that it may be very difficult to design and build this shield.

Where can I fund the Eagle files for a blank shield?

Does anyone have advice or lessons learned on how to design this project?  (FPGA Pin selection, voltage levels, tri-state pins, ...)

Is there a preferred vendor to manufacture a new PCB?

Thank you!

Mark

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