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Au DDR tutorial gives "Cr...
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Alchitry Hd, Mo, Ft
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HDMI or video out shield ...
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VHDL to Verilog Conversio...
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Alchitry Labs -> Alchitry...
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PING))) Ultrasonic Distan...
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I/O Magic on Au and VHDL
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How to implement a simple...
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Feature Request: Full FTD...
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  Au DDR tutorial gives "Critical Warning" on build
Posted by: Rory - 10-09-2020, 12:29 PM - Forum: General Questions - Replies (1)

I was duplicating the tutorial on how to use the DDR memory on the Au, but I get a Critical Warning upon building. 
The design runs ok, but the "Critical" part of the warning worries me a bit.

I think the problems start right at the start when I add the Memory Controller. It complains about not finding an .xci file:

[Image: img1.png]
Compare this to exactly the same stage in the tutorial:
[Image: img2.png]

It makes the same complaint after I add the clock wizard core (in fact it seems to say this after generating any cores).
When I add in all the code (exactly duplicating the tutorial), it successfully builds, but gives me the critical warning:

Parsing XDC File [C:/NarwhalDevices/FPGA_projects/DDR_example/work/constraint/alchitry.xdc]
CRITICAL WARNING: [Constraints 18-1056] Clock 'clk_0' completely overrides clock 'clk'.

Should I just ignore the warning, or is it a sign that there is something wrong, and it will come back to bite me?


Note: I'm using Windows 10, Alchitry Labs 1.2.1, and Vivado 2020.1
(see attachment for full output)

Attached Files
.txt   DDR tutorial Critical Warning.txt (Size: 84.02 KB / Downloads: 1)

  Alchitry Hd, Mo, Ft
Posted by: LMN128 - 10-05-2020, 04:20 PM - Forum: General Questions - No Replies

what is a progress of these modules production, please?[Image: aBCWwUFnSAqZNQKP9]

Attached Files
.jpg   EBOm1leXYAAq4Fy.jpg (Size: 497.25 KB / Downloads: 7)

  Alchitry Labs -> Alchitry Loader
Posted by: ramonae86 - 08-27-2020, 07:11 PM - Forum: General Questions - Replies (1)

So I was using Alchitry Loader fine in the beginning, both interface 0 and 1 were FTDI driver.

Then I used zadig to change Interface 0 to WinUSB, and I was able to use Alchitry Labs to interact with the board.

But then I tried to switch back to Alchitry Loader again, it seems I just can't get it working whatsoever. I tried to delete the driver from device manager, tried all kinds of drivers in Zadig, I just couldn't reset the Driver to the propriatary FTDI driver and couldn't program the board with Alchitry Loader, it always says Can't Find Device.

Any suggestions? Thanks

  PING))) Ultrasonic Distance Sensor
Posted by: john.tilghman@protonmail.com - 08-26-2020, 06:03 AM - Forum: General Questions - Replies (1)

I am trying to see if anyone has used the PING))) Ultrasonic Distance Sensor before.

It has some interesting timing to be able to use it, as well as it's triggered as well as the return echo come back on the same pin.

PING))) Ultrasonic Distance Sensor I have a lot of these to drive and a AVR just bogs down the more you put on.

From the website:

Quote:Interfacing to a microcontroller is a snap. A single I/O pin is used to trigger an ultrasonic burst (well above human hearing) and then "listen" for the echo return pulse. The sensor measures the time required for the echo return, and returns this value to the microcontroller as a variable-width pulse via the same I/O pin.

Thanks for any insight.


Lightbulb Feature Request: Full FTDI Connection on Alchitry Cu
Posted by: rrc - 08-24-2020, 10:08 PM - Forum: General Questions - Replies (1)


as I am now working with connecting the Alchitry Cu with my application I had a closer look on the FTDI-Chip. It is possible to do multiple modes as UART, SPI and parallel with it. On the schematic only two pins of the port B for communication with the FPGA are connected (usable for UART). It would be a very nice feature if the user can optionally connect the other pins to the FPGA (for example with jumpers or solder pads for 0 Ohm resistors). This would lead to a gain of data rate (if using parallel mode) if someone is trying to do something with high data throughput. Additionally communicating with SPI can be more simple to implement for beginners and makes it easier to migrate on a micro-controller application (relevant for hardware accelerators).

What do you think about it?


  VHDL to Verilog Conversion
Posted by: rrc - 08-22-2020, 08:05 PM - Forum: General Questions - Replies (2)


does anyone know a good VHDL to Verilog converter?

I am using the Alchitry Cu with icestorm/nextpnr. And as yosys only works with Verilog I can not apply my VHDL knowledge.

I currently write stuff in Verilog but it is not my language of choice Wink


  Generated Verilog
Posted by: john.tilghman@protonmail.com - 08-22-2020, 02:29 AM - Forum: General Questions - Replies (2)

Does anyone know if you can see and/or work with the Verilog code that is created from using Lucid and Alchitry Labs ?

I would like to see my code and be able to use the schematics that Vivado makes.


  Found a some good starter information..
Posted by: john.tilghman@protonmail.com - 08-18-2020, 01:57 AM - Forum: General Questions - Replies (2)

Found a some good starter information..

Notes on setting up and using Alchitry FPGA boards

  Loader "No Devices Found!" Au Windows 10
Posted by: BNW - 08-15-2020, 01:14 PM - Forum: General Questions - Replies (3)

I'm trying to use alchitry-loader.exe or loader.exe so I can do my projects in Vivado and it cannot locate the device. This is what my command line looks like:

C:\Program Files (x86)\Alchitry\Alchitry Loader\tools>loader -l

No devices found!
I am, however, able to write in Alchitry Labs, so I know the drivers are working. I also downloaded the Windows Drivers in this tutorial: https://alchitry.com/pages/alchitry-loader. I have confirmed that WinUSB is installed for Alchitry AU Interface 0 and 1. 

Any help would be greatly appreciated!

  Microphone Array Shield
Posted by: Mudkip177 - 08-14-2020, 01:29 PM - Forum: General Questions - Replies (1)

The mic array seems like a pretty cool project.  Are there any plans to make the shield available?