Hello all, 
I noticed the was not a convenient list of what physical pins of the Cu board connects to what header on the Br board. So I figured it out and am going to post the .pcf file here. I also have a template for icestorm builds using that pcf. I was wondering if I should submit a pull request and to which projects if any. Would anybody be interested? Also, did I duplicate work by accident?

Attached Files

  pins.txt (Size: 1.68 KB / Downloads: 6)

Hi, I am just learning about FPGA and programming it and don't know much about it.
I was wondering if Alchitry Labs and the Lucid IDE can be used to program other boards that have a different usecase but posses the Xilinx chip, like the ettus USRP?

Hi all,

In my FPGA adventures, I quickly stumbled onto the "FPGA Hell", so now I am looking how to debug the signals going through the Alchitry boards.

Which tool do you prefer and why?

1. Alchitry wave capture
   
   
   
2. Wishbone controlled scope to capture vcd and show in gtkwave, setup described in this article
   
   
   
3. Vivado debugging Integrated Logic Analyzer ILA
   
   
   
4. Litescope, wich can also export to sigrok
   
   
5. Your own debug statements sent over uart
   

I am just curious about how many people are annoyed by their homework. If you are just going to lecture me, about how I should do my own homework don't bother posting. Its suppose to be structured like you are talking to someone in ancient Greece, Rome, Egypt or some other ancient civilization. If you can do my college homework -tutors help online so just reply otherwise you don't need to answer. I am smart enough to get my homework done in just an hour but I got annoyed by it. If I don't submit my homework till Monday i will fail on that course.

It appears that the $pow function in Lucid/Alchitry Labs has a problem when the result is above 32 bits:

eg:

$pow(10, 11)  =  37'h00 c876 e800  but it should be: 37'h17 4876 E800

$pow(10, 10)  = 34'h0 d40b e400  but it should be: 34'h2 540B E400

This causes the component bin_to_dec to work incorrectly for high, 10 digit numbers.

Hello,

I am confused about why it seems like the same FIFO or buffer, data_d/data_q, is being used for both MISO and MOSI communication.  On the rising edges of the SPI clock, data_d is reading bits in from MOSI.  On the falling edges, these bits are being output on MISO.  I would think each would have its own FIFO to read data in and data out from the slave device.  Let me know if I am incorrect in assuming this buffer is considered a FIFO.

Also, why is it necessary to output the MSB to MISO when the SS signal is not pulled low?

Thanks in advance!

Hi, 

Is there any chance that all the expansion shields for the Mojo will be back available?

I only see microphone and sdram shield in stock. 

Any chance:

Clock shield
Hdmi shield
Camera shield
Servo shield

Back in stock in future? 

Thx in advance

I have Alchitry Labs running on my PC and I'm able to get the tutorials working. The one thing that is impacting my productivity is the IDE. Alchitry Labs, while decent, is nowhere close to the functionality of an IDE like VSCode or Atom.

I see that there's a Lucid HDL extension for VSCode, but it only provides syntax highlighting support. Would it be possible to post the commands that we'd need to execute (I assume they're `java -jar` commands) to convert a .luc file to the working directory structure that you use before you invoke the ICE tool chain? Once we have that it'd be easy to rig up a Makefile or a simple batch file to convert from .luc to .bin.

Hi there,

Thanks again for these «small and powerful» boards. They are really nice tools to do some dev.
I was wondering if there is for you a preferred chanel to propose some idea (on new feature/device…). Somewhere we could have the type of discussion which was present during the crowdfunding campaign (ie. the LVD signals) ?

Cheers.

Is there any simple tutorial for the AU with vilvado. It all seems to be outdated tutorials for old projects.