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quad spi flash, E8, qspi_flash_sck_io
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1
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68
|
April 22, 2022
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USB-UART, which port is which?
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2
|
98
|
April 21, 2022
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Au .bin file loads but cannot program flash
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6
|
94
|
April 16, 2022
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Lucid V2
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10
|
144
|
April 16, 2022
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Base Vivado project for Au+: compatibility
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1
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98
|
April 15, 2022
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Always block
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1
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76
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April 15, 2022
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Troubles with CU setup
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3
|
108
|
April 15, 2022
|
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JTAG and QSPI Flash on Alchitry Au
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2
|
109
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April 12, 2022
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Could not detect an Au!
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7
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110
|
March 17, 2022
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URL typo error in the Alchitry Tutorials (Background) section
|
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1
|
47
|
March 17, 2022
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iceprog - Can't find iCE FTDI USB device with Alchitry CU
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0
|
56
|
March 3, 2022
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Moving data into a case statement
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3
|
65
|
February 28, 2022
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Cloning a project
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2
|
52
|
February 26, 2022
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Passing variables into case statements
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0
|
45
|
February 20, 2022
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Dead LED in display :(
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4
|
53
|
January 31, 2022
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Not really aimed at FPGA but…
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2
|
34
|
January 27, 2022
|
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Shields for the SparkFun DEV-17514 Alchitry Au+ Development Board
|
|
1
|
61
|
January 27, 2022
|
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CORE Generator fails to generate core
|
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0
|
37
|
January 26, 2022
|
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SRAM 16 Mbit (2M x 8) 10ns board
|
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7
|
53
|
January 23, 2022
|
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Au + Board IP's
|
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2
|
56
|
January 22, 2022
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New to Lucid and Alchitry but...
|
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3
|
75
|
January 21, 2022
|
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FPGA configuration in SPI slave mode
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1
|
46
|
January 20, 2022
|
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Using Lucid for other than Demo/Tutorial designs
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|
1
|
49
|
January 20, 2022
|
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Verilog example for Serial data transfer on Au
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2
|
82
|
January 17, 2022
|
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AU Plus UART Capability
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2
|
44
|
January 12, 2022
|
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HDMI Error - tmds_encoder.luc bug?
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1
|
33
|
January 11, 2022
|
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Connecting multiple FPGAs?
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|
2
|
43
|
January 11, 2022
|
|
MicroBlaze & Au Plus
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|
1
|
45
|
January 11, 2022
|
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routing DDR3 fails with invalid clock parameters
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|
3
|
172
|
January 2, 2022
|
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Au plus and DDR3 Tutorial
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|
6
|
89
|
December 28, 2021
|